EPROM enable pin

[silverfox0786]

Hi im working on a custom homebrew project and needed to know how eprom chips work

namely the 27128 and 27256 chips

what I wanted to know is to enable the chip do I send a high to CE (Chip Enable) or OE (Output Enable) or is the VCC that needs to be high

I know some chips wont disable entirely if only VCC is set to low and wasn't sure if its OE or CE that needs to be set to High for Chips operation and low for chip to be off

would appreciate some help here

Thanks

 

[pulstar]

The datasheet for 27128 say that OE & CE are both active low. So to enable output and to enable the chip you need to pull both of these pins low.

Same for 27256, output enable are chip enable are both active low.
pulstar2014-06-23 17:21:54

 

[guddler]

You seriously need to look up some data sheets!

VCC is the supply voltage, so that's never low, always +5v (on 5v devices of course). And on every 27128 / 27256 I've heard of the pins are usually active low, so you pull them low to activate them. The sequence of events you need to follow will be in the data sheet as a waveform / timing diagram. It will give what signals need to do what and in what order and for how long each one has to stay that way in order to make the various things happen.

It's usually pretty simple until you start to get into manually programming them.

 

[silverfox0786]

cheers pulstar so both thos pins would need active low for the chip to be enabled and active high for the chip to be disabled

 

[pulstar]

cheers pulstar so both thos pins would need active low for the chip to be enabled and active high for the chip to be disabled

Yep. Like Guddler said, if you're creating a project out of it you need to do things in a certain sequence (and set amount of time) to get it working correctly which is all in the datasheets.

 

[guddler]

Essentially, /E goes low first and at that point valid data must be on the address bus. Then /G must go low and a certain amount of NS later data will appear on the data bus so there must be no bus contention at that time. Timings are specific to make and model of chip and also timing variant of chip within manufacturer. Again, it's in the data sheet. Data will remain valid on the data bus for a given number of NS during which time you are expected to transition both /E and /G to high to signal the end of the operation.

The order of releasing the signals is usually not so important as the order of asserting them.

If you are simply knocking up a simple circuit that is what I would call "bit banging" the chip to read it in a non timing critical way then you will often get away with being quite slow and non-critical about it. However if you are implementing a system with other components that you'll have to be pretty strict about it all.

 

[silverfox0786]

apart from looking at pinouts data sgeets confuse me

this is what im reading

Standby Mode
The M27128A has a standby mode which reduces
the maximum active power current from 85mA to
40mA. The M27128A is placed in the standby mode
by applying a TTL high signal to the E input. When
in the standby mode, the outputs are in a high
impedance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger memory
arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
M27128A
2/10
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is required
from a particular memory device.

 

[guddler]

Yep, none of which has a great deal to do with actually getting data out. That is all talking about the fact the chip has a low power mode which ensures that when it is not enabled it does not produce any loading on the data bus and does not therefore interfere with any other items in the circuit.

Looks like you're reading the same data sheet as me so read further down to tables 5 and 7 which give the read waveform and read timings.

And sadly, as critical as this sounds, if data sheets confuse you then you need to stop designing circuits and do some more reading unit they don't, then re-visit your project

 

[Muppz]

For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus.

That comment is Sooo processor specific, very poor to do that in a datasheet. G would only work in that fashion if the processor had a separate RD signal that was active low (a la Z80) on the 6502/6809 etc R/W would be High for a read and so need inverting.

 

[silverfox0786]

And sadly, as critical as this sounds, if data sheets confuse you then you need to stop designing circuits and do some more reading unit they don't, then re-visit your project

I do respect and appreciate everyone's input, yours as well martin, but that statement Is very cleshay

what your saying is lets all not go to school or college or university and be taught by a teacher but just start reading and learning from written text on our own.

the whole point of me asking was so I could get more heads on this so I can better understand things which will then also further my understanding of this as a whole.

with that said I will tell you what I am trying, I want to get 2 or maybe 3 27256/128 chips and piggy back them lifting the relevant enable pin and putting a controller on to it or even a DPDT switch i'm not sure yet. and then I can select which EPROM I enabled as and when I want that particular program written to that chip to run

the changes will only happen when a hard reset occurs, never during power on state so you would need to power down the whole circuit change the EPROMs enable (select the chip) and then power on again.

basically I could just have a socketed chip and change as and when the whole chip but that so time consuming when the circuit will be cased up so I wanted a way of doing it without touching the chips and having them all in place.

 

[Macro]

yes, you can put a switch to set the relevant chip enable high/low if you want to bank eproms, or even connect several up to a latch to drive it by software select.

you can also cheat, you will often find that where an eprom needs a quick response, the /CE is permanently wired to GND, in that way it will commence decoding the address as soon as it is able and it can shave some time off of the states access speed. (also works for RAM) you then just control the output by use of the /OE line on it's own.

a large number of circuits in arcade PCB land just common the two pins and drive them both at the same time

so, unless you are pushing the boundaries of the eprom speed you can be quite flexible in how you drive them.

 

[silverfox0786]

ok great now im starting to understand more Thanks

will this work

 

[Macro]

I would certainly expect it to, yes.

 

[silverfox0786]

That's brilliant Thank you

 

[Judder]

Have a read of Elgen's blog where he added a switching system to allow his Bubble Bobble board to play Redux and Lost Cave using a switchable chip method

http://elgensrepairs.blogspot.co.uk/2014/04/bubble-bobble-lost-cave-redux-on-same.html

Covers the basic of how the 27xxx family chips work - they are all similar regardless of size [bar 2532s but that's another story...]

Hope that helps!

 

[silverfox0786]

Thanks Judder I will have a read up and that's basically what im trying to do. be able to switch between 2 or 3 games on a 27128.27256 chip

funny you mention 2532s as I been working with them too and know they are a logic high so to use a 2732 you need to swap a few pins and add a LS04 hex inverter on the OE line to invert the logic

Cheerssilverfox07862014-06-24 14:58:46

 

[simonden]

Not quite that simples! Sometimes you have to look at manufacturer, eg Texas Instrument 2532 is equivalent to other manufacturer's 2732 and are pulled low to enable, whereas their 2732 was not compatible with 2732's from others.

 

[silverfox0786]

That's good info to know thanks
but then TI was always a law into them selves

 

[Elgen]

Hee Hee, I was just going to link to my BB LC/REDUX-post, but I see someone already found it };-P
Which games are you trying to switch between and on which PCB?

Anyhow, good luck with the project... these things are always fun to play with...Elgen2014-06-24 15:54:10

 

[silverfox0786]

You always have some great blogs Elgen. and reading that blog made me want to buy a BB boot just to try it myself, you made it look so easy
While I have you here that last image on the blog where you turn the board on is missing, really wanted to see the end results.

Its actually not an arcade board im working on but a Games console. An Atari 7800 PAL machine. They come with what is called GOB (Game on Board)BIOS and its Astroids. Blue Azure over at AA has made a few GOB files where instead you can have other games Pole Position 2 and Pacman+ using Bens game code.

Its a simple burn a EPROM and do a rom swap (my original Atari has a 27128 in it right now)

what I want to do is use 3 EPROMS with all 3 games on it and be able to switch between them via piggyback. (Bank Switching is something im still learning)

Its just something I I want to do for fun as I do enjoy Atari and tinkering is always fun to do.