[ukvac] [Tech] SI Pt II
Okay, so as you may guess I'm working at getting my two SI Pt 2 boards
going at the moment (from hereon just called SI, just to confuse!)...
The screen just comes up with a small amount of garbage which flashes
continuosly (the POR cicuit at pin 10 IS wired to gnd. The 8080 on this
one _LOOK_ reasonable when probed (ooer)
Can anyone explain the ram section to me please in laymans terms??
I have the schematics in front of me and I was checking out the logic
chips associated with the ram as all the ram pulses or not on the
correct pins (obviously no saying it's the right stuff going in and out,
or that it's doing it at the right time!!)
On the schematics (PVN00005) there are a series of 4 74LS157 muliplexers
at the LHS of the address bus. Using an HP logic comparator to check
these shows they are fine. Tucked in there are a couple of gates from ic
40 (7404) which again compare fine. Haven't tested the gate used in IC
41 (7420).
Right, as I say, memory _looks_ to be behaving reasonably, so onto the
logic on the other side of the address bus (if the terminology is wrong
it's cause I'm referring to it physically on the schematics really). D0
from each pair of ram chips is fed through an inverter in a 7404 (one of
two actually). If I test these, IC42 (bits 0-5) is all over the place,
and IC40 (bits 6 & 7) has a duff output on bit 7.
So, I remove IC 42, fit a socket, and replace with a known good 7404 -
ADMITTEDLY a 74LS04 as I don't have any plain old 7404s. Same pins still
all over the place!!!
Can someone point me in the right direction here please?
Should I just shotgun all the memory - bit drastic as that would take 32
Ics (2 boardsets) and as far as I can see they ain't easy to get hold
of...
TIA,
Guddler.
Okay, so as you may guess I'm working at getting my two SI Pt 2 boards
going at the moment (from hereon just called SI, just to confuse!)...
The screen just comes up with a small amount of garbage which flashes
continuosly (the POR cicuit at pin 10 IS wired to gnd. The 8080 on this
one _LOOK_ reasonable when probed (ooer)
Can anyone explain the ram section to me please in laymans terms??
I have the schematics in front of me and I was checking out the logic
chips associated with the ram as all the ram pulses or not on the
correct pins (obviously no saying it's the right stuff going in and out,
or that it's doing it at the right time!!)
On the schematics (PVN00005) there are a series of 4 74LS157 muliplexers
at the LHS of the address bus. Using an HP logic comparator to check
these shows they are fine. Tucked in there are a couple of gates from ic
40 (7404) which again compare fine. Haven't tested the gate used in IC
41 (7420).
Right, as I say, memory _looks_ to be behaving reasonably, so onto the
logic on the other side of the address bus (if the terminology is wrong
it's cause I'm referring to it physically on the schematics really). D0
from each pair of ram chips is fed through an inverter in a 7404 (one of
two actually). If I test these, IC42 (bits 0-5) is all over the place,
and IC40 (bits 6 & 7) has a duff output on bit 7.
So, I remove IC 42, fit a socket, and replace with a known good 7404 -
ADMITTEDLY a 74LS04 as I don't have any plain old 7404s. Same pins still
all over the place!!!
Can someone point me in the right direction here please?
Should I just shotgun all the memory - bit drastic as that would take 32
Ics (2 boardsets) and as far as I can see they ain't easy to get hold
of...
TIA,
Guddler.
the test procedures ring tru for both boards tho.